The present invention relates to electronic circuits, and more particularly to detection of signals in such circuits.
In many high-speed digital transmission standards differential signals are employed for improved signal-integrity, reduced electromagnetic radiation, and other advantages. The differential signals may assume one of three states, positive (e.g. ‘1’), negative (e.g. ‘0’), and common-mode (e.g., they are nearly equal). Existence of the third state provides options for new features.
In some systems, received differential signal peaks must be compared against a specified threshold to detect the presence or absence of a certain signal level. Such comparisons may be required to decide whether the signal is present (Loss-of-Signal detection, LoS), or to detect Out-of-Band (OoB) signal transmission. The latter application relies on a series of fast signal bursts separated by relatively long silent gaps to transmit signals that need to be differentiated from the normal data.
FIG. 1 shows the input and output signals of a high-speed peak comparator 10 used as OoB signal regenerator. Peak comparator 10 differentiates between the channel noise and the high-speed signal bursts of the incoming signal, and converts the bursts into equivalent binary signals, High and Low. Such circuits are utilized in such standards as SATA (Serial AT Attachment) and SAS (Serial Attached SCSI). As is known, high-speed signal detectors have other applications as well and may or may not be differential.
FIG. 2 is a block diagram of a differential peak comparator 200, as known in the prior art. Both terminals of the differential inputs are compared against the threshold value. Comparators 202 and 204 compare the voltages on positive and negative input terminals to a positive threshold voltage (VTH), and produce a logic HIGH if the input is higher than the threshold. If either side of the input is higher than the threshold, the output generated by the OR-gate 204 is HIGH.
At high speeds, digital signals produced by transmitters may deviate from ideal square waveforms. Limited bandwidth of transmission channels further distorts the received signal. Accurate comparison of the received signal with the threshold voltage at high speed becomes challenging. The comparators shown in FIG. 2 are required to have fast responses to detect the narrow peaks with good resolution.
High-speed digital signals may have large variations in their waveform. For example, consecutive transmission of the 1010101010 bit-pattern may produce a very different waveform than repeated transmission of the 1111100000 pattern. The clock frequency of the signal may also be variable in a system. Such waveform variations make the peak measurements more complex because they do not allow for a simple compensation for the waveform factor.
An envelope detector may be used to produce a slower varying output voltage, which tracks the input signal's amplitude. Comparison of such a slow varying voltage to a threshold is more practical. A peak comparator 300 based on a common envelope detector is shown in FIG. 3. Peak comparator 300 is shown as including amplifiers 302, 304, and NMOS transistors 306, 308 that charge capacitor 312 to the absolute value of the single-ended peak voltage of the input. Resistor 310 gradually discharges capacitor 312 to slowly track reduction in the peak voltage of the input signal. Comparator 314 detects if the input amplitude of signal VPEAK exceeds the threshold voltage VTH. The feedback loop gain of the peak detectors is relatively low at high frequency, and as a result, the peak detector does not provide the required accuracy.
Nonlinearity in the transfer characteristics of MOS transistors provides a means of rectifying the input signal. However, since the input signal level is usually low (for example tens of milivolts single-ended, to minimize power dissipation in the system) conventional rectifiers using MOS transistors have non-ideal characteristics.